| October 20, 2010 |
Session 1: Opening Session
Chairperson: E. Kondoh |
| 9:30-9:40 |
Opening Remarks: S. Kondo, Chair of Asian Session [Renesas
Electronics]
Award Ceremony |
9:40-10:20
(1-1) |
Keynotes: Challenges in Green Nanoelectronics: Growing
Expectations for Tsukuba Innovation Arena
[AIST/Fujitsu Labs..] N. Yokoyama |
10:20-11:00
(1-2) |
Keynotes: Driving Innovation for Growth [Intel K. K.]
T. Abe |
Session 2: Nano devices and processes
Chairperson: Y. Uchida |
11:00-11:30
(2-1) |
Invited: Integration of EUV Patterned Interconnects
[IMEC] S. Demuynck |
11:30-11:50
(2-2) |
Improvement in Electrical Properties of Carbon
Nanotube Via Interconnects [1MIRAI-Selete, 2Toshiba] M. Katagiri1, 2, Y. Yamazaki1, 2, M. Wada2, M. Kitamura2, N. Sakuma1, 2, M. Suzuki1, 2, S. Sato1, M. Nihei1, A. Kajita2, T. Sakai1, 2, and Y. Awano1 |
11:50-12:10
(2-3) |
Iridium Nanocrystal Thin Film Transistor
Nonvolatile Memory with Asymmetric Tunnel
Barrier [1Chung Hua Univ., 2Chung Hua Univ., 3National Chiao Tung Univ., 4Min Dao Univ.] T.-L. Lu1, C.-H. Wu2, T.-J. Wang3, Y.-C. Liu1, C.-T. Kuo4, and I.-J. Hsieh1 |
| (Lunch 1 hour 40 min) |
Session 3: Chemical Mechanical Planarization
Chairpersons: Y. Tsuchiya |
13:50-14:20
(3-1) |
Invited: Novel Slurry Injector Device for Chemical
Mechanical Planarization [1Univ. of Arizona, 2Araca] A. Meled1, L. Borucki2, Y. Sampurno1, 2, Y. Zhuang1, 2, S. Theng 2, and A. Philipossian1, 2 |
(3-2)
Withdrawn
|
Electrochemical Etching of Ru Film Using
an NH4Cl Solution with Neutral pH 11Osaka Univ., 2STARC] L. Yang1, R .Sakae1, M. Yashimaru2, M. Yamaguchi2, I. Kanno2, M. Tanaka2, C. Kimura1, and H. Aoki1 |
14:20-14:40
(3-3) |
Study of Cu-Inhibitor State for Post-CMP
Cleaning [1Mitsubishi Chemical, 2Osaka Univ.] K. Harada1, A. Ito1, Y. Kawase1, K. Kamiya1, T. Suzuki1, M. Hara2, R. Sakae2, C. Kimura2 , and H. Aoki2 |
14:40-15:00
(3-4) |
SiC-CMP Characteristics under High Pressure
Gas Atmospheres Using Manganese Slurry [1Kyushu Univ., 2Mitsubishi Chemical, 3Mitsui Mining & Smelting, 4Fujitsu] T. Hasegawa1, T. K.Doi1, S. Kurokawa1, O. Ohnishi1, Y. Kawase2, Y. Yamaguchi3, and S. Kishii1,4 |
15:00-15:20
(3-5) |
Cu CMP Process Control by Using Optical CD
Measurement. [Renesas Electronics] H. Tsuchiyama,
T. Kamonshima, H. Takewaka, N. Uchida, and
K. Sakai |
| (Coffee Break 20 min) |
Session 4: Low-k 1
Chairperson: H. Shibata, N. Aoi |
15:40-16:10
(4-1) |
Invited: Interconnect Process and Structure Toward
20 nm CMOS Generation and Beyond Featuring
EUVL [Renesas Electronics] N. Oda |
16:10-16:30
(4-2) |
Analysis of Sidewall Damage Layer in Low-k
Film Using the Interline Dielectric Capacitance
Measurements [Renesas Electronics] T. Furuhashi,
M. Matsumoto, S. Kido, M. Okada, Y. Kawano,
M. Fujisawa, and K. Asai |
16:30-16:50
(4-3) |
Effects of Post-etching Treatment (PET) on
Molecular-pore-stacking (MPS)/Cu Interconnects
for 28 nm-node and beyond [Renesas Electronics]
D. Oshida, I. Kume, H. Katsuyama, T. Taiji,
T. Maruyama, M. Ueki, N. Inoue, M. Iguchi,
K. Fujii, N. Oda and M. Sakurai |
16:50-17:10
(4-4) |
Internal Repair for Plasma Damaged Low-k
Films by Methylating Chemical Vapor [1Taiyo-Nippon Sanso, 2Tokai Univ.] S. Nagano1, K. Sakoda1, S. Hasaka1, and K. Kobayashi2 |
17:10-17:40
(4-5) |
Invited: Future of PECVD and Spin on Low-k materials
[IBM, Stanford Univ.] G.
Dubois |
17:40-18:00
(4-6) |
Structure-Modification Model of Porogen-Based
Porous SiOC Film with UV Curing [1Renesas Electronics, 2Univ. of Tsukuba] Y. Oka1, A. Uedono2, K. Goto1, Y. Hirose1, M. Matsuura1, M. Fujisawa1, and K. Asai1 |
18:00-18:20
(4-7) |
Comparison of Restoration Effects between
UV and Plasma-assisted Process [1ASM Japan, 2ASM Belgium] A. Nakano1, Y. Kimura1, I. Yanagisawa1, K. Matsushita1, D. de Roest2, and N. Kobayashi1 |
| October 21, 2010 |
Session 5: Low-k 2
Chairpersons: S. Fukuyama, T. Kokubo |
9:00-9:30
(5-1) |
Invited: Patterning Integration Choices for High Performance
Interconnects [Intel] R. Brain |
9:30-9:50
(5-2) |
Breakthrough Reduction of Low-k Damage with
Cryoplasma Ashing [1Univ. of Tokyo, 2IBM, 3Stanford Univ.] F. Iacopi1, J.H. Choi1, H. Muneoka1, S. Mori1, K. Terashima1, P.M. Rice2, L. Krupp2 ,and G. Dubois2, 3 |
9:50-10:10
(5-3) |
Enhancement of RIE Plasma Resistance of Porous
Silica Low-k Films [ULVAC] M. Hirakawa, I.
Tojo, T. Yamazaki, T. Kusawake, T. Kagami,
T. Nakayama, and H. Murakami |
10:10-10:30
(5-4) |
Damage-inducing Mechanism in Low-k Films
due to VUV, UV Radiation, Radical and Ion
in Etching and Ashing Plasma [Nagoya Univ.]
K. Takeda, Y. Miyawaki, M. Sekine, and M.
Hori |
| (Coffee Break 20 min) |
10:50-11:10
(5-5) |
Isobutyl Silane Precursors for SiCH low-k
Cap Layer beyond the 22 nm Node: Analysis
of Film Structure for Compatibility of Lower
k-value and High Barrier Properties [1Taiyo-Nippon Sanso, 2Univ. of Tokyo, 3National Institute for Materials Science,
4Tri Chemical Lab.] H. Shimizu1, 2, N. Tajima3, T. Kada4, S. Nagano1, and Y. Shimogaki2 |
11:10-11:30
(5-6) |
Electrical Characteristics of Novel Non-porous
Low-k Dielectric Fluorocarbon on Cu Interconnects
for 22 nm Generation and Beyond [1Tohoku Univ., 2Tokyo Electron Tech.] X. Gu1, T. Nemoto1, 2, Y. Tomita1, K. Miyatani2, A. Saito2, Y. Kobayashi2, A. Teramoto1, S. Kuroki1, T. Nozawa2, T. Matsuoka2, S. Sugawa1, and T. Ohmi1 |
11:30-11:50
(5-7) |
In-situ Spectroscopic Ellipsometry in Supercritical
CO2 Solutions and Its Application to Low-k Thin
Film Characterization [Univ. of Yamanashi]
E. Kondoh, Y. Tamegai, K. Kotaka, and L.
Jin |
| (Lunch 1 hour 20 min) |
Session 6: Metal 1
Chairpersons: K. Maekawa, H. Kawasaki |
13:10-13:40
(6-1) |
Invited: Interconnect Scaling Trends and Opportunities
[IBM] S.V. Nitta |
13:40-14:10
(6-2) |
Invited: Metallization for Integrated Circuits via
Electroplating in Sc-CO2 emulsion [Tokyo
Inst. of Tech.] M. Sone |
14:10-14:30
(6-3) |
Role of Impurity Segregation to Cu/Cap Interface
and Grain Boundary on Resistivity and Electromigration
in Cu/Low-k Interconnects [Renesas Electronics]
S. Yokogawa, and Y. Kakuhara |
14:30-14:50
(6-4) |
Punch-through Process in the Sequence of
Cu-Mn Deposition [Fujitsu Semiconductor]
M. Haneda, T. Tabira, and H. Sakai |
14:50-15:10
(6-5) |
Effect of Impurities and Microstructure of
Cu Electroplating Films on Cu Interconnects
Reliability Using CuAl Alloy Seed [Renesas
Electronics] S. Muranaka, M. Sueyoshi, K.
Mori, K. Maekawa, M. Fujisawa, and K. Asai |
| (Coffee Break 20 min) |
Session 7: Metal 2
Chairpersons: S. Yokogawa |
15:30-16:00
(7-1) |
Invited: Comparison of Process Options for Improving
Electromigration in 28 nm Node Technologies
and beyond [Globalfoundries] O.Aubel, C.Hennesthal,
J. Hahn, J.Boemmels, M.Nopper, R. Seidel |
16:00-16:20
(7-2) |
CVD Cobalt as an Enhancement Layer to Improve
Cu/Low-k Interconnect Performance [Samsung
Electronics] H. Lee, T. Matsuda, J. Kang,
H. Jung, J. Hong, J. Yun, J. Park, J. Lee,
I. Park, G. Choi, S. Choi, and C. Chung |
16:20-16:40
(7-3) |
Effect of Chemical Reaction on Cu Alloy/TaN
Interfacial Toughness [Univ. of Tokyo] S.
Ikemoto, S. Nambu, J. Inoue, and T. Koseki |
(7-4)
Withdrawn |
Effect of Low Electron Barrier Height Elements
Addition on Nickel Silicide Contact Resistance
for Advanced CMOS [TSMC] H.C. Hsu, C.W. Nieh,
W.C. Tsai, Y.C. Lin, C.P. Lo, C.H. Lai, C.W.
Chen, Y.C. Chen, C.H. Wang, P.H. Lee, C.C.
Lin, T.L. Lee, D.W. Lin, M.Y. Wang, M.D.
Lei, and H.J. Tao |
Session 7: MEMS
Chairpersons: N. Shimoyama |
16:40-17:00
(7-5) |
An RF-MEMS Tunable Capacitor Using Quadruple
Series Capacitor Structure and Brittle Material
Springs [Toshiba] H. Yamazaki, T. Ikehashi,
T. Saito, E. Ogawa, T. Masunaga, K. Masunish,
Y. Tomizawa, T. Ohguro, Y. Sugizaki, and
H. Shibata |
17:00-17:20
(7-6) |
Digitally Controllable RF MEMS Inductor [Tokyo
Inst. of Tech.] A. Shirane, Y. Mizuochi,
S. Amakawa, N. Ishihara and K. Masu |
Poster Session and Banquet (17:20-19:40)
Chairperson: K. Ueno |
| Cu, BMs, and silicides |
| P-1 |
Bottom-up Deposition of Advanced iPVD Cu
Process Integrated with iPVD Ti and CVD Ru
[Tokyo Electron AT] T. Ishizaka, T. Sakuma,
M. Kawamata, O. Yokoyama, T. Kato, A. Gomi,
C. Yasumuro, H. Toshima, T. Fukushima, Y.
Mizusawa, T. Hatano, and M. Hara |
| P-2 |
Chemical Vapor Deposition of Copper Using
Very Low-cost Cu (I) Precursor [Tokyo Electron]
I. Gunji, H. Itoh, Y. Kashiwagi, M. Narushima,
and S. Hosaka |
| P-3 |
Prediction of Stress Induced Voiding Lifetime
in Cu Damascene Interconnect by Computer
Aided Vacancy Migration Analysis [Tohoku
Univ.] H. Shigeyama, T. Nemoto, and A. T.
Yokobori, Jr1 |
| P-4 |
The Mechanical Properties of Nanocrystal
Copper Thin Film [Univ. of Tokyo] K.S. Angkhirasakhup,
J. Inoue, and T. Koseki |
| P-5 |
Self-annealing at Room Temperature of Copper
Electroplating by Additive Free Bath [Tokyo
Inst. of Tech.] E. Shinada, T.-F.M. Chang,
A. Shibata, M. Sone |
| P-6 |
Mechanism Verification on the Electrochemical
Migration of Fine Cu Wiring [IBIDEN] D. Komatsu,
N. Takahashi and T. Furutani |
| P-7 |
Improved Step Coverage of Cu Seed Layers
by Magnetic Field Assisted Ionized Sputtering
[ULVAC] Y. Sakamoto, K. Kamada, J. Hamaguchi,
A. Sano, Y. Numata, S. Kodaira, S. Toyoda,
and K. Su |
| P-8 |
Radical Step Coverage Improvement in Directional
Beam Target (DBT) Sputter [1Handong Global Univ., 2National Fusion Research Institute, 3Kookje Electric Korea] J. T. Kim1, Y. C. Park1, B. J. Lee2, and J. H. Han3 |
| P-9 |
Structural and Electrical Characteristics
of Cu-Mn/SiOC/Si [1Tohoku Univ., 2Toray Research Center] S. M. Chung1, J. Koike1, Y. Otsuka2, H. Sako2, K. Ishibashi2, and N. Kawasaki2 |
| P-10 |
Thermal Performance of a New Cu Alloy Film
for Advanced Interconnects [1Chin-Min Inst. of Tech., 2National Taiwan Univ. of Science and Tech.,
3National Taiwan Ocean Univ.] C.H. Lin1 , J.P. Chu2, and W.K. Leau3 |
| P-11 |
Characteristics of ZrNx Films Prepared by
Radical Reaction of Sputtered Zr [1Kitami Inst. of Tech., 2Tohoku Univ.] M.
Sato1, M.B. Takeyama1, Y. Hayasaka2, E. Aoyagi2, and A. Noya1 |
| P-12 |
Plasma-enhanced Atomic Layer Deposition of
TaCx films Using a New Ta Precursor and H2 Plasma; Applications to Diffusion Barrier
for Cu Metallization and Metal Gate for NMOS
[1Yeungnam Univ., 2Applied Materials, 3DNF solution] T.-H. Kim1, T.-K. Eom1, H. Kim2, S. Yu2, J. M. Lim3, and S.-H. Kim1 |
| P-13 |
Atomic Layer Deposition of Thin VNx Film
from TDEAV Precursor [1Kitami Inst. of Tech., 2Gas-phase Growth, 3Tohoku Univ.] M.B. Takeyama1, M. Sato1, H. Sudoh2, H. Machida2, S. Ito3, E. Aoyagi3, and A. Noya1 |
| P-14 |
Atomic Layer Deposition of Novel Ru-Al-O
Thin Films for Seedless Copper Electroplating
Applications [1Yeungnam Univ, 2NCD Tech.] T.-H. Cheon1, T.-K. Eom1, S.-H. Choi1, K.-J. Choi2, and S.-H. Kim2 |
| P-15 |
Improvement of the Performance of Ru Diffusion
Barrier against Cu by Incorporating Very
Thin WNx Thin Films for Cu Metallization
[Yeungnam Univ.] W. Sari, T.-K. Eom, S.-H.
Choi, and S.-H. Kim |
| P-16 |
Formation of Palladium Silicide Thin Layers
on Si (110) Substrates [Nagoya Univ.] R.
Suryana, O. Nakatsuka, and S. Zaima |
| Nanometal technology |
| P-17 |
Chemical Vapor Deposition of Nanocarbon on
Electroless Ni-B Alloy Catalyst [Shibaura
Inst. of Tech.] T. Tanaka, T. Sato, Y. Karasawa,
and K. Ueno |
| P-18 |
GeSbTe Composition in Minute Hole Filled
by Chemical Vapor Deposition for Phase Change
Memory [1Gas-phase Growth, 2Meiji Univ., 3Tokyo Univ. of Agriculture and Tech., 4Toyota Tech. Inst.] H. Machida1, T. Horiike2, S. Hamada2, T. Uno2, N. Sawamoto2, M. Ishikawa1, 3, A. Ogura2, and Y. Ohshita4 |
| P-19 |
Magnetic Properties of Fe-Pt Alloy Films
Electrodeposited from a Bath Containing a
Trivalent Iron Salt [Univ. of Shinshu] T.
Kamo, and S. Arai |
| P-20 |
A Study on Electrical Etching Methods on
the Surface of an Ag Nanowire for Detecting
Ammonia Vapor [KAIST] J. Kwon, H. Shim, D.
Lim, K. Kang, J. Lee, K. Kim, and S. Kim |
| Low-k |
| P-21 |
Highly Hermetic Barrier Low-k SiC (k<3.5)
by Using New Precursor for 28 nm-Node Devices
and beyond [1Renesas Electronics, 2Taiyo-Nippon Sanso, 3Tri Chemical Lab.] C. Kobayashi1, Y. Miura1, S. Nagano2, K. Ohto1, H. Shimizu2, T. Kada3, T. Ohira3, T. Usami1, and K. Fujii1 |
| P-22 |
First Evaluation of New Advanced SOG 2.0
Low-k Material [1IMEC, 2Moscow Inst. of Electronic Tech., 3SBA Materials] E.A. Smirnov1, 2, K. Vanstreels1, P. Verdonk1, D. Shamiryan1, M.R. Baklanov1, M. Phillips3 |
| P-23 |
Influence of the UV Cure on Advanced PECVD
low k Materials [1IMEC, 2ASM Belgium] P. Verdonck1, E.V. Besien1, C. Trompoukis1, K. Vanstreels1, A. Urbanowicz1, D.D. Roest2, and M.R. Baklanov1 |
| P-24 |
BEOL Reliability Improvement by Enhancing
Porous SiCOH Dielectric's Mechanical Strength
without Increasing RC Delay for 45 nm and
beyond [United Microelectronics] B.-S. Tsai,
W. Chen, Y.-J. Hung, C. C. Liu, and J. F.
Lin |
| P-25 |
A Wafer-level Reliability Evaluation of the
Cu/Low-k Wiring [CASMAT] H. Kawakami, M.
Itoh, and Y. Kawamoto |
| CMP, cleaning, and related technologies |
| P-26 |
Slurry Supplying Method for Large Quartz
Glass Substrate Polishing [1Kyushu Institute of Tech., 2Toppan Printing] P. Khajornrungruang1, R. Yui1, N. Wada2, K. Suzuki1, and K. Kimura1 |
| P-27 |
Characteristics of Silicon CMP Performed
in Various High Pressure Atmospheres, - Development
of a New Double-side Simultaneous CMP Machine
Housed in a High Pressure Chamber - [1Kyushu Univ., 2Kyushu Univ., 3The Koshiyama Science and Tech. Foundation,
4Fujikoshi Machinery] K. Kitamura1, T. Doi1, S. Kurokawa1 , O. Ohnishi1, Y. Umezaki1, T. Yamazaki1, Y. Matsukawa1, T. Hasegawa1, I. Koshiyama2, and K. Ichikawa3 |
| P-28 |
Development on Original End Point Detection
Utilizing Eddy Current Variation by Skin
Effect in Chemical Mechanical Polishing [Tokyo
Seimitsu] T. Fujita, K. Kitade and T. Yokoyama |
| P-29 |
Tribological and Kinetic Characterization
of 300-mm Copper Chemical Mechanical Planarization
Process [1Univ. of Arizona, 2Araca, 3Intel] Z. Han1, Y. Zhuang1, 2, Y. Sampurno1, 2, A. Meled2, Y. Jiao1, X. Wei1, J. Cheng1, M. Moinpour3, D. Hooper3, and A. Philipossian1, 2 |
| P-30 |
CMP Characteristic on Crystal Orientations
of Single-crystal Si and High-precision Planarization
CMP of Poly-Si [1Kyushu Univ., 2Shin-Etsu Chemical ] S. Yoshiura2, T. Doi2, S. Kurokawa2, O. Ohnishi2, amd N. Shinya2 |
| P-31 |
Effect of Temperature on Pad Surface Contact
Area in Chemical Mechanical Planarization
[1Univ. of Arizona, 2Araca, 3Cabot Microelectronics] Y. Jiao1, Y. Zhuang1, 2, Z. Han1, X. Liao1, Y. A. Sampuno1, 2, A. Naman3, and A. Philipossian1, 2 |
| P-32 |
Electrochemical Reactions during Ru CMP and
Safety Considerations [Ebara] S. Shima, Y.
Wada, K. Tokushige, A. Fukunaga, and M. Tsujimura |
| P-33 |
Disappearance of Barrier Metal during Cu
CMP Processing and Its Mechanism [Fujimi]
H. Asano, A. Yasui, T. Hirano, K. Tamai,
and H. Morinaga |
| P-34 |
The Studies of Ru-CMP Process Development
for 22 nm Node and Beyond [1Ebara, 2Ebara Technologies, 3Tokyo Electron Tech. Center of America] T.
Nomura1, S. Paul2, H.-M. Wang2, T. Iizumi1, Y. Wada1, K. Tokushige1, M. Tsujimura1, J. Rullan3, H. Nagai3, and S. Mizuno3 |
| P-35 |
Study on Sapphire Chemical Mechanical Polishing
using Mixed Abrasive Slurry with Fullerenol
[Kyushu Institute of Tech.] K. Suzuki, T.
Saitou, T. Korezawa, P. Khajornrungruang,
and K. Kimura |
| P-36 |
Semiconductor Device Cleaning with Liquid
Aerosol Nozzle using Rotary Atomizer Method
[1Asahi Sunac, 2Kyushu Univ.] Y. Seike1, K. Miyachi1, S. Kurokawa2, O. Ohnishi2, and T. Doi2 |
| P-37 |
Application of Novel Ultrasonic Cleaning
Equipment Using Waveguide Mode for Single-Wafer
Cleaning Process [1Kaijo, 2Shibaura Inst. of Tech.] K. Suzuki1, Y. Imazeki1, K. Han1, S. Okano1, J. Soejima1, and Y. Koike2 |
| P-38 |
Tribological Effects of Brush Scrubbing in
Post-CMP Cleaning on the Electrical Characteristics
in the Novel Non-porous Low-k Dielectric
on Cu Interconnects [Tohoku Univ.] X. Gu,
T. Nemoto, Y. Tomita, A. Teramoto, S. Sugawa,
and T. Ohmi |
| P-39 |
Evaluation of Cu-CMP Corrosion Caused by
Different Density Pattern Connection [CASMAT]
K. Okutani |
| P-40 |
New Corrosion Inhibitor for Post Cu-CMP Cleaning
Solution [Kanto Chemical] Y. Murakami, and
N. Ishikawa |
| P-41 |
Diamond Conditioner Microwear Effect on Pad
Surface Height Distribution in Tungsten Chemical
Mechanical Polishing [1Hitachi, 2A.L.M.T.] Y. Yamada1, M. Kawakubo1, and K. Kadomura2 |
| P-42 |
Quantification of Asperity's Conditions on
Pad Surface with Diamond Conditioner [1A.L.M.T., 2Kyushu Univ., 3Hitachi] K. Kadomura1, S. Kurokawa2, T. Doi2, T. Akama2, Y. Yamada3, Y. Matsukawa2, Y. Umezaki2, and O. Ohnishi2 |
| P-43 |
Investigation of Effects of CMP Conditioner
Aggressiveness on Oxide and Cu Wafer Removal
Rates [Saint Gobain Abrasives] T. Hwang,
and R. Vedantham |
| October 22, 2010 |
Session 8: 3D special session
Chairpersons: T.ohba, D. L. Diehl, D. Shu,
J. Koike, J. Amanokura |
| 9:25-9:30 |
Brief Note of 3D Session: T. Ohba [Univ. of Tokyo] |
9:30-10:10
(8-1) |
Keynotes: 3DIC TSV Stacking - Challenges and Opportunities
[TSMC] S.-P. Jeng |
10:10-10:50
(8-2) |
Keynotes: Updated Results of R&D on Functionally
Innovative 3D-Integrated
Circuit (Dream Chip)
Technology in FY2009 [ASET]
M. Kada |
| (Coffee Break 20min) |
11:10-11:40
(8-3) |
Invited: TSV based 3DIC integration technology [ITRI]
T. K. Ku |
11:40-12:10
(8-4) |
Invited: New Generation of Cost-effective Seedless
Techinologies for Through
Silicon Vias [Alchimer]
C. Truzzi, and S. Lerner |
| (Lunch 1hour 20min) |
13:30-14:00
(8-5) |
Invited: Invited: 3D Integration Technology Using
Bumpless Wafer on Wafer (WOW) Stacking [1Fujitsu Lab., 2 Univ.of Tokyo, 3Dai Nippon Printing] T. Nakamura1, H. Kitada1, 2, N. Maeda2, K. Fujimoto3, and T. Ohba2 |
14:00-14:30
(8-6) |
Invited: Overview on 3D IC Packaging Technology Trend
[ASE] K. C. Yee |
14:30-14:50
(8-7) |
TSV Technology for 3D Reconfigurable Chip
(3D FlexChip) [ASET] K.Takeda,
M.Aoki, K.Hozawa,
K.Osada and Y.Nakagawa |
14:50-15:10
(8-8) |
Formation and Evaluation of Electroless Barrier
Films for High Aspect Ratio Through-Si Vias
[1Kansai Univ. 2Kobe Advanced Research Center] H. Miyake1, F. Inoue1, T. Yokoyama1, T. Shimizu1, S. Tanaka2, T. Terui2 and S.Shingubara1 |
15:10-15:30
(8-9) |
Investigation of Total Thickness Variation
for Wafer Stack varied with Bonding Pressure
and Adhesive Polymer Uniformity [1Dai Nippon Printing, 2Ayumi Industry and 3Univ. of Tokyo] K. Sakamoto1, K. Fujimoto1, H. Abe2, N. Maeda3, H. Kitada3, K. Suzuki1, and T. Ohba3 |
| (Coffee Break 20min) |
15:50-16:20
(8-10) |
Invited: Trend of Flash memory and 3 dimensional
technology [Natinal Chiao Tung Univ.] R.
Shirota |
16:20-16:40
(8-11) |
Stress and Diffusion Resistance of Low Temperature
CVD Dielectrics for Multi-TSVs on Bumpless
Wafer-on-Wafer (WOW) Technology [1Univ.of Tokyo, 2Fujitsu Lab., 3Dai Nippon Printing] H. Kitada1, 2, N. Maeda1, K. Fujimoto3, Y. Mizushima2, Y. Nakata2, T. Nakamura2, and T. Ohba1 |
16:40-17:00
(8-12) |
Characterization of Local Strain around Through-Silicon
Via Interconnects by Using X-ray Microdiffraction
[1Nagoya Univ., 2Univ.of Tokyo, 3Fujitsu Lab.] O. Nakatsuka1, H. Kitada2, Y. S. Kim2, Y. Mizushima3, T. Nakamura3, T. Ohba2 and S. Zaima1 |
17:00-17:20
(8-13) |
Formation of TSV for the Stacking of Advanced
Logic Devices Utilizing Bumpless Wafe r-on-Wafer
Technology [1Applied Materials Japan, 2Applied Materials Inc., 3Applied Materials Inc., 4Fujitsu Lab., 5Univ.of Tokyo] D. Diehl1, H. Kitada4, 5, N. Maeda5, K. Fujimoto5, S. Ramaswami2, K. Sirajuddin2, R. Yalamanchili2, B. Eaton2, N.Rajagopalan2, R. Ding2, S. Patel2, Z Cao2, R. Kulzer3, I. Drucker3, D. Erickson3, T. Ritzdorf3, T. Nakamura4 and T. Ohba5 |
17:20-17:40
(8-14) |
High speed Copper CMP Slurry for TSV application
based on AFM analysis [1Hitachi Chemical, 2Hitachi] J.Amanokura1, H.Ono1 and K.Hombo2 |
| 17:40-17:45 |
3D Closing Remark: D.Shu [ITRI] |
| 17:45-17:55 |
ADMETA Closing Remark: K. Ueno [Shibaura Institute of Technology] |
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