October 9, 2008 |
Session1: Opening Session
Chairperson: K. Ueno |
9:30
-9:40 |
Opening Remarks: T. Yoda, Chair of Asian Session [Toshiba]
Award Ceremony |
9:40
-10:20
(1-1) |
Keynotes: Business Strategy and Challenges for Interconnect
Technology [Toshiba] S. Saito |
10:20
-11:00
(1-2) |
Keynotes: Albany is Global HOT Spot - Message from
Albany, NY [New York State Univ.] M. Hirayama |
|
Session 2: 3D Si and Cu Deposition
Chairperson: E. Kondoh |
11:00
-11:20
(2-1) |
Novel and Production-Worthy Wafer-on-a-Wafer
(WOW) Technology Using Self-Aligned TSV (SALT)
Interconnects [Univ. of Tokyo, *Dai Nippon
Printing, **Fujitsu Laboratories] N. Maeda,
H. Kitada, K. Fujimoto*, K. Suzuki*, T. Nakamura**
and T. Ohba |
11:20
-11:40
(2-2) |
Investigations of Cu Filling in Through-Si
Via Holes using Direct Electroless Plating
on CVD-W [Kansai Univ., *Tohoku Univ., **National
Institute of Communication Technology, ***Shaanxi
Normal Univ.] F. Inoue, M. Koyanagi*, T.
Fukushima*, K. Yamamoto**, S. Tanaka**, Z.
Wang***, and S. Shingubara |
11:40
-12:00
(2-3) |
Chemical Vapor Deposition of Copper from
New Precursors [Univ. of Tokyo, *Air Products
and Chemicals] H. Song, J. A.T. Norman* and
Y. Shimogaki |
|
(Lunch 60min) |
|
Session 3: CMP & Characterization
Chairperson: S. Kondo |
13:00
-13:30
(3-1) |
Invited: Challenges in Planarization for Sub-32nm
Logic Technology [AMD] Y. Moon |
13:30
-13:50
(3-2) |
Characterization of Cu Corrosion Phenomena
with Scanning Kelvin Probe Force Microscopy
[Ebara] S. Shima, K. Tokushige, A. Fukunaga
and M. Tsujimura |
13:50
-14:10
(3-3) |
A Fast New Approach for Evaluating the Connectivity
of Micropores (<2 nm) and Supermicropores
(<0.5 nm) in Low-k Thin Films [Univ. of
Yamanashi, *NEC Electronics] E. Kondoh, S.
Aruga, F. Ito* and Y. Hayashi* |
14:10
-14:30
(3-4) |
Structural Analysis of Low-k Porous SiOC
Film by Electron Energy Loss Spectroscopy
(EELS) [Toshiba, *Toray Research Center]
M. Shimada, A. Kojima, Y. Otsuka*, Y. Shimizu*,
H. Seki*, N. Nakamura and T. Yoda |
14:30
-14:50
(3-5) |
Characterization of Defects Generated in
SiCN Dielectrics for Copper Diffusion Barriers
[Tokai Univ.] T. Ide, Y. Takahashi and K.
Kobayashi |
|
(Coffee Break 20min) |
|
Session 4: Low-k Process
Chairpersons: Y. Uchida & N. Aoi |
15:10
-15:40
(4-1) |
Invited: Engineering of Chemical and Physical Properties
of Low-k Materials by Different Wavelength
of UV Light [IMEC, *Masaryk Univ., **Leibniz-Institute
of Surface Modification, ***ASM Belgium]
M.R. Baklanov, P.Marsik*, L.Prager**, P.Verdonck,
K.Ferchichi and D.De Roest***, |
15:40
-16:00
(4-2) |
Novel Oxygen-free Barrier SiC Film (k<3.5)
with High Etching Selectivity [Semiconductor
Leading Edge Technologies, *Taiyo Nippon
Sanso] J. Nakahira, Y. Inaishi*, S. Nakao,
M. Shinriki*, E. Soda, K. Tomioka, S. Chikaki,
N. Oda, S. Hasaka* and S. Kondo |
16:00
-16:20
(4-3) |
Highly-Reliable Seamless Low-k SiOCH Stacks
(SEALS) with High Adhesion Strength Interface
by Advanced Plasma Co-polymerization Process
[NEC Electronics] H. Yamamoto, F. Ito, T.
Takeuchi, N. Furutake and Y. Hayashi |
16:20
-16:40
(4-4) |
Mechanism of Plasma Damage Resistance on
Porous MSX Film with Methylene Bridge [Toshiba]
M. Shimada, K. Watanabe, A. Gawase, H. Miyajima
and H. Yano |
16:40
-17:00
(4-5) |
Effect of Surface Roughness on Plasma-induced
Degradation of Porous Low-k Material [Fujitsu
Laboratories, *Fujitsu] T. Kirimura, Y. Iba*,
S. Ozaki, Y. Kobayashi and Y. Nakata |
17:00
-17:20
(4-6) |
Recombination of О and Н Atoms on the Surface
of Nanoporous SiOCH Dielectric Films [Moscow
State Univ., *IMEC] O.V. Braginsky, A.S.
Kovalev, D.V. Lopaev, E.M. Malykhin, Yu.
A. Mankelevich, T.V. Rakhimova, A.N. Vasilieva,
S.M. Zyryanov and M.R. Baklanov* |
17:20
-17:40
(4-7) |
Realization of High Stable Porous SiOCH Films
(k=2.3-2.4, Er=8.0 GPa) using DcPDMOS by
O2 Addition and UV Cure [Tri Chemical Laboratories,
*Taiyo Nippon Sanso] Y. Xu, M. Shinriki*,
Y. Inaishi* and S. Hasaka* |
|
Guest Paper from USA (17:40-18:00) |
|
Session 5: Poster Session & Banquet (18:10-20:00)
Chairperson: Y. Shimogaki |
Cu |
(P-1) |
A Kinetic Study on Cu2O Deposition and Reduction
for Continuous Cu Film Fabrication [Univ.
of Tokyo] H. Asano, Y. Susa and Y. Shimogaki |
(P-2) |
Grain Growth of Electroplated Copper Film
by Alternative Annealing Methods [Shibaura
Institute of Technology, *KISCO] K. Ueno,
K. Shimotani, Y. Shimada, S.Yomogida*, T.
Takeshita, and T. Yata* |
(P-3) |
Feasibility Study of Multi Wafer Deposition
System by Supercritical Fluid Deposition
of Cu for Mass production [Univ. of Tokyo]
T. Momose,M. Sugiyama, and Y. Shimogaki |
(P-4) |
Influences of Mg Content and Annealing on
the Adhesion of Cu(Mg) Thin Film to Glass
Substrate [Sejong Univ., *Hanbat National
Univ., **Heraeus Oriental Hitec] S.-G. Kang
W.-D. Yun*, S.-.K. Rha*, S.-J. Lee** and
W.-J. Lee |
(P-5) |
Nanometer-scale Four-Point Probe Resistance
Measurements of Cu Wires Using Carbon Nanotube
Tips [Univ. of Tokyo] Y. Kitaoka, S. Yoshimoto,
T. Hirahara, S. Hasegawa and T. Ohba |
(P-6) |
In-die Cu Thickness Monitoring of Memory
Chip [Hynix Semiconductor, *Rudolph Technologies]
H.-S. Lee, C. Kim, H. Yoo, T.-K. Kim, C.
H. Lee, S. Son, K. Park*, P. Mukundhan* and
C. Kim* |
Low-k |
(P-7) |
UV Cure Control of Pore Interconnectivity
for Porogen-based SiOC Films [ASM Japan]
N. Tsuji, K. Matsushita, S. Kaneko, N. Takamure
and N. Kobayashi |
(P-8) |
Spin-on Organic Low-k Material (k=2.2) with
Thin Ti Liner Interconnect [Sumitomo Bakelite,
*Consortium for Advanced Semiconductor Materials
and Related Technologies] Y. Ono, M. Matsutani,
T. Harada, M. Tada* and Y. Ando* |
(P-9) |
Fabrication and Investigation of New Amino-silane
Precursor (BEMAS) for Low temperature Deposition
of SiO and SiN [Japan Advanced Chemicals,
*National Institute of Advanced Industrial
Science and Technology] S. Nozu, S. Yasuhara
and K. Endo* |
(P-10) |
Ultra Low-k Precursor Solution for 32 nm-node
Interconnects [ULVAC] M. Hirakawa, S. Asahina,
T. Yamazaki, T. Nakayama and H. Murakami |
(P-11) |
Characterization of pSiCOH for 45nm BEOL
Interconnects and Beyond [Chartered Semiconductor
Manufacturing, *Applied Materials] J. Widodo,
T. Ouyang, H. Liu, W. Lu, M. S. Zhou, K.
H. Leong*, H. S. Tang* and A. Jain* |
(P-12) |
Impact of Ammonia and Nitrogen Plasma Treatment
on the Property of Ultra Low-k Films [Chartered
Semiconductor Manufacturing] H. W. Cheng,
H. Liu, J. Widodo, T. Ouyang, W. Lu, Z. X.
Xing and M. S. Zhou |
(P-13) |
Hydrogen Dependence of Film Properties of
High Tensile Stress UV Cured Silicon Nitride
for 45nm Bulk Device [Chartered Semiconductor
Manufacturing] J. Tian, L. Goh, J. Shu and
W. Lu , M. Zhou |
(P-14) |
Characterization of Damage of Low-k Films
Between Narrow Cu lines by Micro Beam IR
method [Toray Research Center, *Semiconductor
Leading Edge Technologies] H. Seki, N. Tarumi*,
Y. Shimizu, Y. Otsuka, H. Hashimoto and S.
Ogawa* |
(P-15) |
Evaluation by Simple Method of Wire Bonding
Process with Ultra Low-k Materials [Consortium
for Advanced Semiconductor Materials and
Related Technologies] M. Hatai and K. Funatsu |
Barrier/Seed |
(P-16) |
Influence of Moisture on the CVD Formation
of a MnOx Barrier Layer [Tohoku Univ., *Tokyo
Electron] K. Neishi, K. Matsumoto*, H. Sato*,
H.Ito*, S. Hosaka* and J. Koike |
(P-17) |
Effects of Hot-wire Nitridating Condition
on Characterizations of TiNx film on SiO2
[Kitami Institute of Technology, Tohoku Univ.]
M. B. Takeyama, M. Sato, Y. Hayasaka*, E.
Aoyagi*, and A. Noya |
(P-18) |
Copper Diffusion Barrier Properties of a
10 nm W-Mo Alloy Films on Porous SiOC:H [National
Cheng Kung Univ., United Microelectronics]
K.-C. Hsu, D.-C. Perng, J.-B. Yeh, R.-P.
Chang, J.-F. Fang and C. Huang* |
(P-19) |
Atomic Layer Deposition of Ruthenium and
Ruthenium Oxide Thin Films Using Ru(EtCp)2
Precursor and Oxygen Gas [POSTECH] W.-H.
Kim, S.-J. Park and H. Kim |
Contact/Silicide/Metal Gate |
(P-20) |
Influence of Hydrogen Plasma Treatment on
Ni and NiPt Silicide Process [Renesas Technology]
T. Tsutsumi , K. Kihara, T. Yamaguchi, T.
Okudaira, K. Kashihara, K. Maekawa, S.Kudo,
K. Asai, M. Kojima and M.Yoneda |
(P-21) |
In-situ CVD CoSix Deposition for Direct Contact
Applications [Applied Materials] S.-E. Phan,
S. Ganguli, H.-C. Ha, S. H. Yu, M. Jackson,
S. Lee, T. Guo, A. Anapolsky and P. Wang |
(P-22) |
Enabling Metal Deposition Technology for
High-k Metal Gate Integration [Applied Materials]
N. Yoshida, R. Wang, X. Tang, D. Liu, L.
Hawrylchak, O. Chan, K. Ahmed, T. Mandreker,
G. Conti, C. Lazik, S. Hung, H. Chen, C.-P.
Chang and S. Gandikota |
(P-23) |
Crystalline and Electrical Properties of
Thin Pd Silicide Layer/Si Contacts [Nagoya
Univ.] R. Suryana, S. Akimoto, O. Nakatsuka
and S. Zaima |
Reliability |
(P-24) |
First Principle Study of Cu-Sn (111) Surface
Diffusion [Univ. of Tokyo] S. Ebato, J. Inoue
and T. Koseki |
(P-25) |
Quantitative Evaluation of Electromigration
Behavior in Cu-Sn Thin Films [Univ. of Tokyo]
S. Yoshimoto, J. Inoue and T. Koseki |
Modeling/Simulation |
(P-26) |
A Simple De-embedding Method for Characterization
of On-chip Four-port Networks [Tokyo Institute
of Technology] S. Amakawa, H. Ito, N. Ishihara
and K. Masu |
(P-27) |
Thermal Stress Enhancement and Crisis of
Low-k Material Around Multi-bit Interconnections
of Operating High Performance Systems [Univ.
of Yamanashi] H. Kato, T. Yoshida, M. Nakamura
and E. Kondoh |
(P-28) |
Lifetime Prediction of Stress Induced Voiding
Failure by Noble Numerical Analysis in Cu
Interconnects with an Ultra Low-k Dielectric
[Tohoku Univ.] S. Nakajima, T. Nemoto and
A.T. Yokobori, Jr. |
|
October 10, 2008 |
Session 6: Barrier/seed (1)
Chairperson: J. Koike |
9:00
-9:30
(6-1) |
Invited: Ionized-PVD Stacked Barrier Structure of
TaN/TaRu for 32nm BEOL Integration [IBM,
*AMD, **Applied Materials] T. Nogami, C-C.
Yang , S. Rossnagel, C.J. Penny, D. Canaperi,
J.J. Kelly, P. Flaitz, P. DeHaven, T. Shaw,
S.A Cohen, C-K. Hu, T. Vo, I. Zienert*, H.
Chung**, R. Wang**, J. Re**, S-C. Seo, A.
Simon, O. van der Straten, I. Ali, J. Piccirillo**,
S.K. Chiang**, J. Wynne, T. Spooner and D.C.
Edelstein |
9:30
-9:50
(6-2) |
RuTaN Films by PEALD using H2 / N2 Plasma
for Cu Diffusion Barrier Layer [ASM Japan]
D. Jeong, K. Namba, H. Inoue and H. Shinriki |
9:50
-10:10
(6-3) |
Conformal CVD Co Deposition for Enhancement
of Cu Gapfill Application [Applied Materials]
J. Lu, H.C. Ha, J. Aubuchon, P. Ma, S.H.
Yu and, M. Narasimhan |
10:10
-10:30
(6-4) |
Electroless NiB Liner on Organosilane Layers
[*Waseda Univ., **Shibaura Institute of Technology,
***Tel-Aviv Univ.] H. Aramaki,* M. Yoshino*,
I. Matsuda*, K. Ueno* **, Y. Shacham-Diamand*
*** and, T. Osaka* |
10:30
-10:50
(6-5) |
Development of Selective Co CVD Capping Process
for Reliability Improvement of Advanced Cu
Interconnect [NEC Electronics, *Applied Materials
Japan, **Applied Materials] E. Nakazawa,
K. Arita, Y. Tsuchiya, Y. Kakuhara, S. Yokogawa,
T. Kurokawa, N. Sasaki*, S. Ganguli**, H.C.
Ha**, W.T. Lee**, S.H. Yu** and M. Sekine |
|
(Coffee Break 20min) |
|
Session 7: Barrier/seed (2) and contact
Chairperson: M. B. Takeyama |
11:10
-11:30
(7-1) |
Copper Seed Feature Level Modeling [Applied
Materials] U. Kelkar, D. Lubben, T. Gung,
A. Sundarrajan, Q. Luo. Y. Cao, X. Tang,
M. Ewert and M. Narasimhan |
11:30
-11:50
(7-2) |
New barrier metal selection principle for
32nm metallization and beyond [NEC Electronics]
K. Motoyama, A. Nakajima, M. Tohara, *T.
Kurokawa, Y. Tsuchiya, K. Fujii and M. Sekine |
11:50
-12:10
(7-3) |
Resistance of Ru barrier layer against oxidation
by moisture in low-k film [Semiconductor
Leading Edge Technologies] N. Tarumi, M.
Shiohara, M. Abe, H. Imamura, S. Kondo and
S. Ogawa |
12:10
-12:30
(7-4) |
Formation of a low resistivity W nucleation
layer using H2 (hydrogen radical) reduction
gas for W plug [Tokyo Electron AT] T. Nishimori
, M. Tanaka , H. Yuasa and M. Tachibana |
|
(Lunch 60min) |
|
Session 8: Special session/Reliability(1)
Chairperson: H. Kawasaki |
13:30
-14:10
(8-1) |
Invited: Cu-drift Induced Electric Leakage during
TDDB Test in Damascene
Cu Interconnect [Seoul
National Univ.] Y-C. Joo |
14:10
-14:40
(8-2) |
Invited: Effects of Scaling and Grain Structure on
Cu Electromigration and Structural Reliability
of Air-gap Interconnects [Univ. of Texas,
*AMD, **Tokyo Electron US] P.S. Ho, X.F.
Zhang, R. Huang, E. Zschech*, M.A. Meyer*
, J.J. Liu** and D. Toma** |
14:40
-15:10
(8-3) |
Invited: Scaling Impacts and Challenges on Reliability
in Cu/low-k [NEC Electronics] S. Yokogawa |
|
(Coffee Break 20min) |
|
Session 9: Special session/Reliability(2)
Chairperson N. Shimizu |
15:30
-15:50
(9-1) |
Characteristics of Downstream Electromigration
of Cu/porous low-k Interconnects [NEC Electronics]
Y. Kakuhara, S. Yokogawa, M. Hiroi and T.
Takewaki |
15:50
-16:10
(9-2) |
Copper Ion Drift as An Early Mode Failure
in Bias Temperature Stressing [Renesas Technology]
H. Miyazaki and D. Kodama |
16:10
-16:30
(9-3) |
Photo Misalignment Impacts on the Low-k TDDB
[NEC Electronics] H. Tsuchiya, Y. Kakuhara,
D. Oshida, M. Iguchi, T. Takewaki and S.
Yokogawa |
16:30
-16:50
(9-4) |
Reduction Effect of Line Edge Roughness on
TDDB lifetime of Cu/Low-k Interconnects by
using CF3I Etching [Semiconductor Leading
Edge Technologies] E. Soda, T. Suzuki, N.
Nakamura, N. Oda, S. Ito, M. Nakamura, S.
Kondo and S. Saito |
|
(Short Break 10min) |
|
Session 10: Integration
Chairperson: F. Ito |
17:00
-17:20
(10-1) |
Multi levels Air gap Integration using Sacrificial
Material Approach for Advanced Cu Interconnects
Technologies [*STMicroelectronics, **CEA-LETI-MINATEC,
***CNRS-LTM] R. Gras* ***, F. Gaillard**,
D. Bouchu**, P.H. Haumesser**, G. Imbert*,
L. Vandroux**, A. Farcy*, T. Chevolleau***,
G. Passemard*, J. Torres* and P. Ancey* |
17:20
-17:40
(10-2) |
Air Gap Integration of 45nm Node Cu Interconnects
and Evaluations of Electrical and Mechanical
Characteristics [Matsushita Electric Industrial,
*Renesas Technology , ** Panasonic Semi-Conductor
Engineering] T. Harada, A. Ueki**, S. Kido*,
K. Tomita*, Y. Kanda, T. Sasaki**, H. Tsuji**,
T. Furuhashi*, T. Kabe, J. Shibata, A. Iwasaki**,
J. Izumitani*, S. Matsumoto, Y. Kawano* and
T. Ueda |
17:40
-18:00
(10-3) |
Impact of Gas Silylation Process on Wire-to-Wire
Leakage Current for Low-k / Cu Dual-Damascene
Interconnects [Toshiba] Y. Hayashi, A. Kojima,
N. Nakamura, H. Masuda, K. Sato, H. Hayashi,
N. Matsunaga and H. Shibata |
18:00
-18:20
(10-4) |
Novel Self-Hydrophobication and Pre-Reinforcement
of Fine Pore Self-Assembled Scalable Porous
Silica Film for Quick Turn-Around-Time Low-k/Cu
Interconnect Process [Semiconductor Leading
Edge Technologies, *Mitsui Chemicals, **ULVAC,
***AIST] S. Chikaki, T. Kubota, H. Tanaka*,
K. Kohmura*, M. Hirakawa**, T. Nakayama**,
Y. Seino***, N. Oda and S. Saito |
18:20-18:30 |
Closing Remarks: Y. Shimogaki [Univ. of Tokyo] |
|